# Why do we need logic gates

## Digital logic and logic gates simply explained

In digital logic and also in computer science, bits have to be linked with one another every now and then, for example to check whether they meet certain conditions. This article is about these types of links.

A bit is a state that can only have two values: in computer science this is 1 for true or 0 for false and in digital electronics one works with different voltage levels: High (corresponding to 1, e.g. + 5V, i.e. current flows) and low (corresponding to 0, 0V, connection to ground, no current flows). For the sake of simplicity, I will limit myself to the use of ones and zeros in this article. A 1 then always means a high level at a pin z. B. on an IC and a 0 a low level.

Most of the time we combine two bits (A and B) with each other, i.e. a 0 or 1 with another 0 or 1. And then get a result bit (Q), again a 0 or 1. With the result bit we can then continue to calculate or it link further. There are logic gates in ICs like the 7410 chip, which offers NAND gates with three inputs and one output, but we don't want to go into that in great detail. In addition, the principle is the same, only with several ones or zeros at the input.

The calculations of the links - there are only 4 combinations with 2 bits - are presented in so-called truth tables so that it is very clear how the logic or the gate works.

Logic symbol: ¬

Gate symbol:

IC: 7404 (includes six inverters)

Basic: NOT

C, Java, Python, etc .: ~ (as opposed to the logical NOT (!)

Guiding principle: True if A AND B are true.

Logic symbol: ⋀

Gate symbol:

IC: 7408 (contains four AND gates with two inputs each)

Basic: AND

C, Java, Python, etc .: & (as opposed to the logical AND (&&))

Guiding principle: True if A OR B are true.

Logic symbol: ⋁

Gate symbol:

IC: 7432 (contains four OR gates with two inputs each)

Basic: OR

C, Java, Python, etc .: | (as opposed to the logical OR (||)

Guiding principle: True if EITHER A OR B are true.

Logic symbol: ⊻

Gate symbol:

IC: 7486 (contains four XOR gates with two inputs each)

Basic: XOR

C, Java, Python, etc .: ^ (there is no explicit XOR for logical operations)

Guiding principle: false if A AND B are true.

Logic symbol: ⊼

Gate symbol:

(As for AND, the ring in front of the output indicates that the result is negated.)

IC: 7400 (contains four NAND gates with two inputs each)

Basic: NOT (A AND B)

C, Java, Python, etc .: ~ (A & B)

Guiding principle: false if A OR B are true.

Logic symbol: ⊽

Gate symbol:

(As for OR, the ring in front of the output indicates that the result is negated.)

IC: 7402 (contains four NOR gates with two inputs each)

Basic: NOT (A OR B)

C, Java, Python, etc .: ~ (A | B)

Example: there is a CPU with 16 address lines (for addressing 65536 individual addresses), in which the lower 32 KiB is reserved for RAM. The top 8 KiB of the address range from 57.243 to 65.535 should only be used for one peripheral device. The chip enable line should therefore always be set to high (so that the peripheral chip processes this data further) when the address lines A15, A14 and A13 are high (or 1). Otherwise CE remains low and the chip ignores the data.

Whenever the CPU addresses an address above 57.242 (the top 8 KiB, binary 1110 0000 0000 0000 to 1111 1111 1111 1111), then the top three bits are 1. If you wanted only the top 4 KiB (binary 1111 0000 0000 0000 to 1111 1111 1111 1111) address (i.e. from address 61.439), then you would have to check the top four bits. But we want to stay at 8 KiB for now.

This results in the following statement: The output should be 1 (for supply for CE = high) when A13, A14 AND A15 are high (or 1).

The easiest way to solve the problem is of course with an AND gate with 3 inputs, such as the 7411 (three AND gates with three inputs each), to which A13, A14 and A15 are clamped to the inputs and the output to CE. Then CE is always high when everything from A13 to A15 is high. If CE needs a low, we simply use the 7410 instead (three NAND gates with three inputs each).

Now you can of course purchase and maintain a huge range of 74 ICs with all possible logic gates. Then you would always have the direct route. Or you take what you have and combine it in such a way that the result is logically the same.

Has one z. B. only AND-ICs 7408 with 2 inputs and one output each. Then you could implement the logic with 2 subqueries (i.e. gates) like this:

Since a 7408 has four AND gates and we only need two of them, we need one IC each with the 7408 (AND with 4 times 2 inputs) as well as with the 7411 (AND with 3 times 3 inputs) and in both cases we still have one 2 gates free. So if you don't have highly complex logics, you don't necessarily save if you keep a lot of special gates in stock.

This means that the four NAND gates of a 7400 are used up. Overall, however, it remains with a single chip. That basically means that we only have to put 7400s on our shopping list and can map everything with it if we try our brains a little.

I found Jörn-Henning Daug's very nicely clear logic calculator on the Internet, which supports you with the calculation, outputs a truth table for a statement and with which you can check whether your own conversion formula to NAND gates is correct, as I did it z. B. made for the above equation.

The fact that there are all ones on the right side means that the terms and left and right of the double arrow are equivalent, i.e. have the same meaning. The result of the truth table is the same in all cases.

The expression tree that you can leave out with the tool is also very meaningful. Here, the left half basically shows us how to wire our 7400, namely like this:

Hardware use: 1 NAND gate Gate scheme:

Hardware use: 2 NAND gates Gate scheme:

Hardware use: 3 NAND gates Gate scheme:

Hardware use: 4 NAND gates Gate scheme:

I have z. B. designed three types of implementation of an XOR gate with it:

A and B represent the inputs, they are defined as binary. You can click on it and switch the state between HIGH and LOW. Q is the output and shows the result (either 1 or 0).

Depending on the state of A and B, the output and the colors of the lines change. Light green means: this section is HIGH and dark green means: this section is LOW. So you can see very well what is happening in the circuit when you change the inputs.

Of course, you can also design much more complex circuits with Logisim. There are libraries for countless gates and blocks.

The documentation from Logisim is very good and also very easy to understand in German. After a short reading, working with Logsim is quite intuitive.

Logical circuits help, for example, in choosing the right address lines for a project like my breadboard computer.

Online logic calculator from Jörn-Henning Daug

LogiSim logic simulator software from Dr. Carl Burch

**The question immediately arises: what is a bit?**A bit is a state that can only have two values: in computer science this is 1 for true or 0 for false and in digital electronics one works with different voltage levels: High (corresponding to 1, e.g. + 5V, i.e. current flows) and low (corresponding to 0, 0V, connection to ground, no current flows). For the sake of simplicity, I will limit myself to the use of ones and zeros in this article. A 1 then always means a high level at a pin z. B. on an IC and a 0 a low level.

Most of the time we combine two bits (A and B) with each other, i.e. a 0 or 1 with another 0 or 1. And then get a result bit (Q), again a 0 or 1. With the result bit we can then continue to calculate or it link further. There are logic gates in ICs like the 7410 chip, which offers NAND gates with three inputs and one output, but we don't want to go into that in great detail. In addition, the principle is the same, only with several ones or zeros at the input.

The calculations of the links - there are only 4 combinations with 2 bits - are presented in so-called truth tables so that it is very clear how the logic or the gate works.

### Types of logical links

There are several ways in which bits can be linked together. Depending on the type of link, the result will be different. The truth tables of the linkage types are all different.### NOT, "Not" or "No, the other way around!"

The emergency link is the simplest link and has only one input and turns a 1 into a 0 and a 0 into a 1. It simply reverses the value, it is also said that it negates or inverts it.Truth table NOT | |
---|---|

Entrance | Exit |

0 | 1 |

1 | 0 |

Logic symbol: ¬

Gate symbol:

IC: 7404 (includes six inverters)

**Use in programming languages:**Basic: NOT

C, Java, Python, etc .: ~ (as opposed to the logical NOT (!)

### AND, "And" or "Everyone must!"

The AND operation has two inputs and one output, like most operations. Output is only 1 if all inputs are 1, otherwise output remains 0.Guiding principle: True if A AND B are true.

Truth table AND | ||
---|---|---|

Entrance a | Entrance B. | Exit |

0 | 0 | 0 |

0 | 1 | 0 |

1 | 0 | 0 |

1 | 1 | 1 |

Logic symbol: ⋀

Gate symbol:

IC: 7408 (contains four AND gates with two inputs each)

**Use in programming languages:**Basic: AND

C, Java, Python, etc .: & (as opposed to the logical AND (&&))

### OR, "Or" or "One is enough."

The OR link has two inputs and one output, like most links. If one of the inputs is 1, the output is 1. The output is only 0 if all inputs are 0.Guiding principle: True if A OR B are true.

Truth table AND | ||
---|---|---|

Entrance a | Entrance B. | Exit |

0 | 0 | 0 |

0 | 1 | 1 |

1 | 0 | 1 |

1 | 1 | 1 |

Logic symbol: ⋁

Gate symbol:

IC: 7432 (contains four OR gates with two inputs each)

**Use in programming languages:**Basic: OR

C, Java, Python, etc .: | (as opposed to the logical OR (||)

### XOR, "Exclusive Or" or "Just don't push. Always only one!"

The exclusive-OR link has two inputs and one output, like most links. Output is only 1 if only one of the inputs is 1. If several or none are 1, then output remains 0.Guiding principle: True if EITHER A OR B are true.

Truth table XOR | ||
---|---|---|

Entrance a | Entrance B. | Exit |

0 | 0 | 0 |

0 | 1 | 1 |

1 | 0 | 1 |

1 | 1 | 0 |

Logic symbol: ⊻

Gate symbol:

IC: 7486 (contains four XOR gates with two inputs each)

**Use in programming languages:**Basic: XOR

C, Java, Python, etc .: ^ (there is no explicit XOR for logical operations)

### NAND, like AND, but with a negated result

The non-AND link works just like an AND, only the result is then reversed at the end, it is an AND, so to speak, followed by a NOT. The NAND connection exists mainly for technical reasons: With these gates every possible connection can be represented. With a few NANDs more or less, you can do without AND, OR, XOR and NOT gates. So you only have to produce NAND gates to be able to build every possible logic circuit. And the production of NAND gates is particularly cheap due to technical conditions.Guiding principle: false if A AND B are true.

Truth table NAND | ||
---|---|---|

Entrance a | Entrance B. | Exit |

0 | 0 | 1 |

0 | 1 | 1 |

1 | 0 | 1 |

1 | 1 | 0 |

Logic symbol: ⊼

Gate symbol:

(As for AND, the ring in front of the output indicates that the result is negated.)

IC: 7400 (contains four NAND gates with two inputs each)

**Use in programming languages:**Basic: NOT (A AND B)

C, Java, Python, etc .: ~ (A & B)

### NOR, like OR, but with a negated result

The no-or link works just like an OR at first, only the result is then reversed at the end, it is, so to speak, an OR, followed by a NOT. Or to put it another way: the output is only 1 if all inputs are 0. The same applies to NOR gates as to NAND gates: every possible link can also be represented with a combination of these.Guiding principle: false if A OR B are true.

Truth table NAND | ||
---|---|---|

Entrance a | Entrance B. | Exit |

0 | 0 | 1 |

0 | 1 | 0 |

1 | 0 | 0 |

1 | 1 | 0 |

Logic symbol: ⊽

Gate symbol:

(As for OR, the ring in front of the output indicates that the result is negated.)

IC: 7402 (contains four NOR gates with two inputs each)

**Use in programming languages:**Basic: NOT (A OR B)

C, Java, Python, etc .: ~ (A | B)

### Use of logic gates in digital circuits

If you want to connect higher chips in digital circuits, for example a CPU with an interface chip, you often face the problem that the chip-enable input (CE) of one (peripheral) chip is linked to special bit combinations from other chips (the CPU) should react, for example only to react to certain addresses.Example: there is a CPU with 16 address lines (for addressing 65536 individual addresses), in which the lower 32 KiB is reserved for RAM. The top 8 KiB of the address range from 57.243 to 65.535 should only be used for one peripheral device. The chip enable line should therefore always be set to high (so that the peripheral chip processes this data further) when the address lines A15, A14 and A13 are high (or 1). Otherwise CE remains low and the chip ignores the data.

Whenever the CPU addresses an address above 57.242 (the top 8 KiB, binary 1110 0000 0000 0000 to 1111 1111 1111 1111), then the top three bits are 1. If you wanted only the top 4 KiB (binary 1111 0000 0000 0000 to 1111 1111 1111 1111) address (i.e. from address 61.439), then you would have to check the top four bits. But we want to stay at 8 KiB for now.

This results in the following statement: The output should be 1 (for supply for CE = high) when A13, A14 AND A15 are high (or 1).

The easiest way to solve the problem is of course with an AND gate with 3 inputs, such as the 7411 (three AND gates with three inputs each), to which A13, A14 and A15 are clamped to the inputs and the output to CE. Then CE is always high when everything from A13 to A15 is high. If CE needs a low, we simply use the 7410 instead (three NAND gates with three inputs each).

A. B. C. | CE |

Now you can of course purchase and maintain a huge range of 74 ICs with all possible logic gates. Then you would always have the direct route. Or you take what you have and combine it in such a way that the result is logically the same.

Has one z. B. only AND-ICs 7408 with 2 inputs and one output each. Then you could implement the logic with 2 subqueries (i.e. gates) like this:

Since a 7408 has four AND gates and we only need two of them, we need one IC each with the 7408 (AND with 4 times 2 inputs) as well as with the 7411 (AND with 3 times 3 inputs) and in both cases we still have one 2 gates free. So if you don't have highly complex logics, you don't necessarily save if you keep a lot of special gates in stock.

### Illustration of other gates with NAND gates

I mentioned that it is possible to use NAND gates (7400) to map any possible logic. Let's try the example above. It's just a matter of logic. In gates it looks like this:This means that the four NAND gates of a 7400 are used up. Overall, however, it remains with a single chip. That basically means that we only have to put 7400s on our shopping list and can map everything with it if we try our brains a little.

I found Jörn-Henning Daug's very nicely clear logic calculator on the Internet, which supports you with the calculation, outputs a truth table for a statement and with which you can check whether your own conversion formula to NAND gates is correct, as I did it z. B. made for the above equation.

The fact that there are all ones on the right side means that the terms and left and right of the double arrow are equivalent, i.e. have the same meaning. The result of the truth table is the same in all cases.

The expression tree that you can leave out with the tool is also very meaningful. Here, the left half basically shows us how to wire our 7400, namely like this:

### Implementation of standard gates in NAND gates

### NOT gate

Equivalence formula: ¬ A = A ⊼ AHardware use: 1 NAND gate Gate scheme:

### AND gate

Equivalence formula: A ⋀ B = ¬ (A ⊼ B) = (A ⊼ B) ⊼ (A ⊼ B)Hardware use: 2 NAND gates Gate scheme:

### OR gate

Equivalence formula: A ⋁ B = (¬ A) ⊼ (¬ B) = (A ⊼ A) ⊼ (B ⊼ B)Hardware use: 3 NAND gates Gate scheme:

### XOR gate

Equivalence formula: A ⊻ B = ((a ⊼ b) ⊼ a) ⊼ ((a ⊼ b) ⊼ b)Hardware use: 4 NAND gates Gate scheme:

### Simulation of logic circuits

If you don't want to rely on the logic calculator and truth tables before converting a circuit into hardware, I would like the free logic simulator software LogiSim from Dr. Carl Burch recommend, with which one can draw and test logic circuits.I have z. B. designed three types of implementation of an XOR gate with it:

A and B represent the inputs, they are defined as binary. You can click on it and switch the state between HIGH and LOW. Q is the output and shows the result (either 1 or 0).

Depending on the state of A and B, the output and the colors of the lines change. Light green means: this section is HIGH and dark green means: this section is LOW. So you can see very well what is happening in the circuit when you change the inputs.

Of course, you can also design much more complex circuits with Logisim. There are libraries for countless gates and blocks.

The documentation from Logisim is very good and also very easy to understand in German. After a short reading, working with Logsim is quite intuitive.

Logical circuits help, for example, in choosing the right address lines for a project like my breadboard computer.

### Sources, references and further links

D. Steinbach: IC data book, Hofacker Verlag 1978Online logic calculator from Jörn-Henning Daug

LogiSim logic simulator software from Dr. Carl Burch

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